Diploma In CS

PYQ – COMPUTER ORGANIZATION & ARCHITECTURE (2418404) | SEMESTER 4TH (2ND YEAR) | Year 2021

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COMPUTER ORGANIZATION & ARCHITECTURE (2418404) – Years
Question 1

Computer Organization & Architecture 2021 (OLD) PYQ.

COA2021PYQ


Group A

Choose the most suitable answer from the following options: -   (1*20=20)


(i) The communication between the components in a microcomputer takes place via the address and

(a) I/O Bus

(b) Data Bus

(c)  Interface

(d) Control Lines


(ii) An interrupt for which hardware automatically transfer the program to a specific memory location is known as:

(a) Software interrupt

(b) Hardware interrupt

(c) Maskable interrupt

(d) Vector interrupt

(iii) Durin DMA acknowledgement cycle, CPU relinquishes.

(a) Address bus only

(b) Address bus and control bus

(c) Control bus and Data bus

(d) Data bus and Address bus


(iv) Cache memory acts between

(a) CPU and RAM

(b) RAM and ROM

(c) CPU and Hard Disk

(d) None of these


(v) An address in main memory is called

(a) Physical address

(b) Logical address

(c) Word address

(d) Memory address


(vi) How many different addresses are required by the memory that contain 16K words?

(a) 16.,380

(b) 16,382

(c) 16,384

(d) 16,386


(vii) How many 128*8 RAM chips are needed to provide a memory capacity of 2048 bytes?

(a) 8 

(b) 16

(c) 24

(d) 32


(viii) When the CPU is executing a program that is a part of operating system, it is said to be in ___________

(a) Interrupt mode

(b) System mode

(c) Half mode

(d) Simplex mode


(ix) A group of bits that tell the computer to perform a specific operation is known as __________

(a) Instruction code

(b) Micro Operation

(c) Accumulator

(d) Register

 
(x) Which of the following is not a characteristic of RISC architecture?

(a) Large instruction set 

(b) One instruction per cycle

(c) Simple addressing modes

(d) Register to register operation

 
(xi) In reverse polish notation, expression A * B + C * D is written as-

(a) A B * C D * +

(b) A B * C + D *

(c) A B * C D + *

(d) * A B * C D +


(xii) The operation executed in data stored in registers is called-

(a) Macro operation

(b) Micro operation

(c) Bit operation

(d) Byte operation


(xiii) Arithmetic shift right operation on (-22)10 result-

(a) (1110101)2

(b) (101010)2

(c) (0101010)2

(d) (1110111)2


(xiv) If a number represented is signed 2’s complement form is 110011, then the decimal equivalent is

(a) (-13)10

(b) (-12)10

(c) (-19)10

(d) (51)10

 
(xv) A common bus system can be consider using

(a)  Decoders

(b) Multiplexers

(c)  Registers

(d) Decoders and Multiplexers


(xvi) Cache memory works on the principal of

(a)  Locality of data

(b) Locality of memory

(c)  Locality of reference

(d) None of these


(xvii) Dynamic RAM consumes _________ power and ________ than the static RAM

(a)  More, Faster

(b) More, Slower

(c)  Less, Slower

(d) Less, Faster


(xviii) Assembly language

(a)  Uses alphabetic codes in place of binary numbers used in machine language.1

(b) It is the easiest language to write programs

(c) Need not be translated into machine language

(d) None of these


(xix) MIMD stands for:

(a) Multiple Instruction Multiple Data

(b) Multiple Instruction Memory Data

(c)  Memory Instruction Multiple Data

(d) Multiple Information Memory Data


(xx) Van Neumann architecture is ___________

(a)  SISD

(b) SIMD

(c)  MIMD

(d) MISD

 

Group:-"B"

Answer all Five Questions: -                         (5*4=20) 

 

2.  Convert the numbers as directed.

a.      (A72E)16 -> (?)8

b.      (0.BF85)16 -> (?)8

OR

Using 9’s complement, subtract 62978 from 2538.

 

3.  Show the block diagram of the hardware that implements the following register transfer statement

xT2 : B <- A, A <- B

OR

A digital computer has a common bus system for 16 registers of 32 bits each. The bus is constructed with multiplexer.

       i.          How many selections inputs are there in each multiplexer?

     ii.          How many multiplexers are there in the bus?

 

4. Explain Booth’s algorithm through an example.  

OR

Write a general algorithm and flow chart for additional and subtraction of two signed magnitude numbers.

 

5.  Explain the different shift operations with examples.

OR

Describe briefly a micro programmed control unit.

 

6. Explain the role of stacks in programming. 

OR

How many bits are needed to represent an instruction in a computer that has 53 different instructions, all of which are two addresses, when the computer has 65000-word memory?

 

Group:- "C"

Answer all Five Questions: -                         (5*6=30) 

 

7.  A virtual memory system has an address space of 8K words, memory space of 4K words and page and block size of 1K words. The following reference change occur during a given time interval. Find page fault:

4, 2, 0, 1, 2, 6, 1, 4, 0, 1, 0, 2, 3, 5, 7.

OR

What is cache memory? Discuss the different mapping process while considering the organization of cache memory.

 

8. What is an interrupt? Describe its significant for digital computers. Also discuss various type of interrupts in brief. 

OR

What do you understand by serial data transfer? Discuss different types of serial data transfer in brief. Also explain the following:

       i.          USART

     ii.          RS232C

 

9. Discuss in brief (with their advantages and disadvantages)

          i.          RISC

         ii.          CISC

OR

Write down the three types of CPU organization with the help of examples.

 

10. What do you mean by modes of transfer? Explain the following:

         i.          Programmed I/O

       ii.          Interrupt initiated I/O

OR

What do you mean by pipeline? How parallel processing is achieved? Explain 4 segment instruction pipeline in details.

 

11.  What do you mean by virtual memory? What is the use of page replacement algorithm? Explain any two with suitable example.

OR

Define the addressing mode. Explain the following in brief: -

       i.          Direct addressing mode

     ii.          Indirect addressing mode

 

*****

 

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